Prof. Dr. Marc Stöttinger

Prof. Dr. Marc Stöttinger | Professor für Technische Informatik und Security

General:

Room: UdE, Haus E, Raum E435
Email: Marc.Stoettinger(at)remove-this.hs-rm.de
Phone: +4961194951214

Postal Address:

Postfach 3251
65022 Wiesbaden

Address:

Unter den Eichen 5
65195 Wiesbaden

Hours:

nach Vereinbarung

  • Since 01/2022: Professorship at RheinMain University of Applied Sciences in the DCSM Department, Germany.
  • 11/2020 to 12/2021: Senior IT-Analysis at the Hessian Ministry of the Interior and Sport Department VII 12 - Hessen Cyber Competence Center, Germany
  • 09/2014 to 10/2020: Senior Expert Automotive Embedded Hardware Cyber Security at Continental AG in the Securtiy & Privacy Competence Center, Germany
  • 09/2012 to 08/2014: Deputy Research Group Leader at Temasek Laboratories @ Nanyang Technological University in the PACE Lab, Singapore
  • 09/2008 to 09/2012: Research Assistant, Technische Universität Darmstadt in the Department of Computer Science, Germany
  • 09/2008 to 09/2012: Associate Researcher, Center for Advance Security Research Darmstadt, Germany
  • 2002 to 2008: Studies of Electrical Engineering and Information Technology at the Technical University of Darmstadt, Germany

Student assistant

  • Daniel Hahn
  • Peter Fecher

Research Assistants

  • Johannes Kaeppel
  • Andreas Hellenbrand
  • Patrick Schönberger
  • Carin Schreiner
  • Julian Wälde

External Research Associates

  • Jan Niklas Fassbender

External Supervised Doctoral Students

  • Sarah Syed-Winkler

Winter Term 2025

  • Module: Bare-Metal Programming
  • Module: Hardware-Related Programming 1
  • Module: Hardware-Related Programming 2
  • Lab: Fundamentals of Digital Electronics

Summer Term 2024

  • Module: Microprocessor Technology
  • Module: Security

Winter Term 2024

  • Module: Hardware-Related Programming 1
  • Module: Embedded Systems
  • Module: Current Topics in Computer Science - Post-Quanten Cryptography 

Summer Term 2023

  • Module: Hardware-Related Programming 2
  • Module: Microprocessor Technology
  • Module: Security

Winter Term 2023

  • Module: Hardware-Related Programming 1
  • Module: Embedded Systems
  • Module: Current Topics in Computer Science - AI in Security 

Summer Term 2022

  • Module: Hardware-Related Programming 2
  • Module: Microprocessor Technology
  • Module: Embedded IT-Security

Open Topics

  • Bachelor thesis:  Implementing the UAF protocol of FIDO devices with post-quantum cryptography
  • Master thesis (in cooperation with Deutsche Bahn): Security analysis of KEM combiners
  • ...

Current Supervising Theses

  • Master thesis: Systematic Analysis of Automotive Forensik - Coreferent
  • Bachelor thesis: Simulation of NIR Data of normal camera data (RGB, visible spectrum) - Coreferent

Supervised Theses

  • 2022:
    • Master thesis : Hardware Accelerator of Lattice-based Post-Quantum Cryptography  - Coreferent
    • Master thesis : Praktische Differentielle Fehleranalyse in der IT Forensik - Referent
  • 2023:
    • Bachelor thesis : Remote-Analyseframework für Implementierungsangriffe auf Basis von Continuous Integration - Coreferent
    • Bachelor thesis : Optimierung des Grundschutz -Checks zur Erstellung eines BSI -konformen IT -Sicherheitskonzepts in der Hessischen Zentrale für Datenverarbeitung - Coreferent
    • Bachelor thesis: Evaluation von Mayo-Signaturverfahren auf FPGAs - Referent
    • Master thesis : Low Power Matrix Client for Microcontrollers  - Coreferent
  • 2024:
    • Bachelor thesis: Optimieren von Elektromagnetischen Seitenkanalangriffen durch Anwendung des Voronoi Algorithmus - Referent
    • Bachelor thesis: Funktionale Analyse und Vergleich: i.MX6 Security Subsystem und TPM2.0 auf dem Dashboard - Referent
    • Bachelor thesis: Toolbasierte Identifikation von Smart Home Komponenten in einem Netzwerk - Referent
    • Bachelor thesis: Practical Approaches on Fault Attacks Targeting IoT-Devices with Low Cost Tools - Referent
    • Bachelor thesis: Praktische Evaluierung von elektromagnetischen und laserinduzierten Angriffen auf eine Blockchiffre - Referent
    • Bachelor thesis: Umsetzung eines FMU-Importers für ARM-Mikrokontroler - Referent
    • Bachelor thesis: Implementierung und Vergleich von Authentifizierungsverfahren einer CAN Kommunikation in sicherheitsrelevanten Nutzfahrzeuganwendungen - Referent
    • Bachelor thesis: Differentiation of User Data and Noise for Inclination sensors - Coreferent
    • Bachelorarbeit: A study for an economically viable solution for the diagnosis of CANopen systems in the gate environment - Referent
    • Bachelorarbeit: Development of a production workstation for focusing camera modules for embedded systems - Coreferent
  • Embedded System Security
    • Implementation attacks (side channel analysis and fault attacks)
    • Secure design of cryptographic algorithms in HW/SW
    • Security architecture at system level
  • Crypto Agility:
    • Post-quantum cryptography with limited resources
    • Secure development and transformation processes
    • Operational security mechanisms and processes for embedded systems
  • Application areas
    • Automotive
    • IoT

Ongoing Research Projects

  • PARFAIT - Post-Quantum Cryptography for Automotive Components
    • BMBF funded
    • Project webpage:
    • Duration: 01.09.2024 - 31.08.2027
  • QUDIS - Quantum-safe Digital Rail
  • DI-SIGN-HEP- Secure industrial application generic HSM based on open EDA-tools and processors
    • BMBF funded
    • Project webpage: :  
    • Duration: 01.06.2024 - 31.05.2027
  • SASPIT - Safe and Secure Sensor Platform for IoT 
  • FIENDISH - ForensIsche Extraktion voN iot-Daten Im Smart-Home
    • funded by the Hessian Ministry of the Interior, for Security and Homeland Security
    • Duration: 01.08.2023 - 30.07.2025

Completed Research Projects

  •  IoT-Matrix-TENG
    • Contract research for the Hessian Center for Data Processing
    • Duration: 01.10.2023 - 31.03.2023

2025

  • DATE 2025 - Programm Committee

2024

  • AsiaCrypt2024 - Programm Committee
  • ACM CSCS 2024 - Programm Committee
  • COSADE 2024 - Programm Committee
  • escar Europe 2024 - Programm Committee
  • FTDC 2024 - Programm Committee
  • Director of the "Computer Science - Technical Systems" degree program

2023

[Translate to English:]

  • ACM CSCS 2023 - Programm Committee
  • CARDIS 2023 - Programm Committee
  • COINS 2023  - Programm Committee
  • COSADE 2023 - Programm Committee
  • Dagstuhl-Seminar 23152 Secure and Efficient Post-Quantum Cryptography in Hardware and Software
  • escar Europe 2023 - Programm Committee
  • SPACE 2023 - Programm Committee
  • Director of the "Computer Science - Technical Systems" degree program
  • Reaccreditation of the degree program "Computer Science - Technical Systems" to the degree program "Computer Engineering"
  • Mitglied im Writing Committee der Promotion "Security and Privacy in the Smart Grid" von Pol Van Aubel an der Radboud University
  • Experts in the application process at the IU Internationale Hochschule

2022

  • CAST 2022 - Programm Committee
  • CARDIS 2022 - Programm Committee
  • COSADE 2022 - Programm Committee
  • escar Europe 2022 - Programm Committee
  • Lorentz Center Workshop Post-Quantum Cryptography for Embedded Systems 2022 - Program Chair
  • SPACE 2022 - Programm Committee

2021

  • CAST 2021 - Programm Committee
  • CHES 2021 - Programm Committee
  • COSADE 2021 - Programm Committee
  • escar Europe 2021 - Programm Committee
  • SPACE 2021 - Programm Committee

2020

  • CAST 2020 - Programm Committee
  • COSADE 2020 - Programm Committee
  • escar Europe 2020 - Programm Committee
  • Lorentz Center Workshop Post-Quantum Cryptography for Embedded Systems 2020 - Program Chair

2019

  • CAST 2019 - Programm Committee
  • COSADE 2019 - Programm Chair
  • Dagstuhl-Seminar 19301 Secure Composition for Hardware Systems
  • escar Europe 2019 - Programm Committee
  • Informatik 2019 - Programm Committee
     

2018

  • CAST 2018 - Programm Committee
  • COSADE 2018 - Programm Committee
  • escar Europe 2018 - Programm Committee
  • ReCoSoc 2018 - Programm Committee

2017

  • CHES 2017 - Programm Committee

2016

  • CHES 2016 - Programm Committee
  • MAL-IoT16 - Programm Committee
  • ReCoSoc 2016 - Programm Committee

2015

  • ReCoSoc 2015 - Programm Committee

2014

  • ReCoSoc 2014 - Programm Committee

2013

  • ReCoSoc 2013 - Programm Committee

2012

  • COSADE 2012 - Program Chair

2011

  • COSADE 2011 - Program Chair
  • NESEA 2011 - Programm Committee

2010

  • COSADE 2010 - Program Chair

2024

  • D. Könnecke, M. Stöttinger: Comparison of TPM2.0 and i.MX 6 Security Subsystem for Securing a Dashboard, to appear in escar 2024
  • J. Ackermann, J. Kaeppel, P. Schönberger, C. Schreiner, M. Stoettinger: Shell we find it: A Shelly Smart Home Device Discovery Tool, to appear in IWDF24
  • A. Weber, T. Grawunder, S. Guilley, G. Heiser, N. Herfurth, C. Lüth, M. Malenko, A. Puccetti, R. Rathfelder, H. Sankowski, J.-P. Seifert, M. Stöttinger and Steffen Reith: A Strategy for Verified Value Chains, to appear in Orshin2024
  • S. Reith, M. Stöttinger: Trust Through Openness - Opportunities for Secure Open-Source Hardware, Security Survey (Release 2/2024)​
  • T. Henkes, S. Reith, M. Stöttinger, N. Herfurth, G. Panic, J. Wälde, F. Buschkowski, P. Sasdrich, C. Lüth, M. Flunk, T. Kiyan, A. Weber,D. Boeck, R. Rathfelder and T. Grawunder: Evaluating an open-source hardware approach from HDL to GDS using a RISC-V chip design – a review of the final stage of project HEP, DATE2024 
  • F. Schmid, S. Mukherjee, S. Picek, M. Stöttinger, F. De Santis and C. Rechberger:  Towards Private Deep Learning-based Side-Channel Analysis using Homomorphic Encryption, COSADE2024 - Document

2023

  • Thomas Aulbach, Fabio Campos, Juliane Krämer, Simona Samardjiska, and Marc Stöttinger: Separating Oil and Vinegar with a Single Trace, TCHES 2023 -  Document
  • Arnd Weber, Sylvain Guilley, René Rathfelder, Marc Stöttinger, Christoph Lüth, Maja Malenko, Torsten Grawunder, Steffen Reith, Armand Puccetti, Jean-Pierre Seifert, Norbert Herfurth, Hagen Sankowski and Gernot Heiser: Verified Value Chains, Innovation and Competition, IEEE-CSR2023.
  • Marius Eggert and Marc Stöttinger: Voronoi Based Multidimensional Parameter Optimization for Fault Injection Attacks, FDTC2023  -  Document

2022

  • Fabio Campos and Michael Meyer and Krijn Reijnders and Marc Stöttinger: Patient Zero & Patient Six: Zero-Value and Correlation Attacks on CSIDH and SIKE, SAC2022 - Document
  • Marc-André Kaufhold, Ali Sercan Basyurt, Kaan Eyilmez, Marc Stöttinger, Christian Reuter: Cyber Threat Observatory: Design and Evaluation of an Interactive Dashboard for Computer Emergency Response Teams, ECIS 2022 - Document

2021

  • YiWang, Marc Stöttinger, YajunHa: A Fault Resistant AES via Input-Output Differential Tables with DPA Awareness, ISCAS 2021
  • Marc-André Kaufhold, Jennifer Fromm, Thea Riebe, Milad Mirbabaie, Philipp Kuehn, Ali Sercan Basyurt, Markus Bayer, Marc Stöttinger, Kaan Eyilmez, Reinhard Möller, Christoph Fuchß, Stefan Stieglitz, Christian Reuter: CYWARN: Strategy and Technology Development for Cross-Platform Cyber Situational Awareness and Actor-Specific Cyber Threat Communication, Workshop-Proceedings Mensch und Computer 2021 - Document
  • Ruben Gonzalez, Andreas Hülsing, Matthias J. Kannwischer, Juliane Krämer, Tanja Lange, Marc Stöttinger, Elisabeth Waitz, Thom Wiggers, Bo-Yin Yang: Verifying Post-Quantum Signatures in 8 kB of RAM, PQCrypto 2021 - eprint

2020

  • Julius Hermelink, Thomas Pöppelmann, Marc Stöttinger, Yi Wang, Yong Wan: Quantum Safe Authenticated Key Exchange Protocol for Automotive Application, 18th escar Europe - Dokument
  • Fabio Campos, Matthias J. Kannwischer, Michael Meyer, Hiroshi Onuki, Marc Stöttinger: Trouble at the CSIDH: Protecting CSIDH with Dummy-Operations Against Fault Injection Attacks, FDTC 2020 - eprint
  • Fabio Campos, Tim Kohlstadt, Steffen Reith, Marc Stöttinger: LMS vs XMSS: Comparison of Stateful Hash-Based Signature Schemes on ARM Cortex-M4, AFRICACRYPT 2020 - eprint
  • Wen Wang, Marc Stöttinger: Post-quantum Secure Architectures for Automotive Hardware Secure Modules - eprint
  • Bernhard Jungk, Marc Stöttinger: Serialized Lightweight SHA-3 FPGA Implementations, Elsevier Microprocessors and Microsystems, Vol. 71

2019

  • Fabio Campos, Michael Meyer, Steffen Sanwald, Marc Stöttinger, Yi Wang: Post-Quantum Cryptography for ECU Security Use Cases, 17th escar Europe - Document
  • Steffen Sanwald, Liron Kaneti, Marc Stöttinger, Martin Böhner: Secure Boot Revisited: Challenges for Secure Implementations in the Automotive Domain, 17th escar Europe - Document
  • Stefan Katzenbeisser, Ilia Polian, Francesco Regazzoni, Marc Stöttinger: Security in Autonomous Systems, ETS 2019

2018

  • Bernhard Jungk, Richard Petri, Marc Stöttinger: Efficient Side-Channel Protections of ARX Ciphers, IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 18 - Document

2017

  • Gavin Xiaoxu Yao, Marc Stöttinger, Ray CC Cheung, Sorin A. Huss: Side-Channel Attacks and Their Low Overhead Countermeasures on Residue Number System Multipliers, Emerging Technology and Architecture for Big-data Analytics

2016

  • Sorin A Huss, Marc Stöttinger: A Novel Mutating Runtime Architecture for Embedding Multiple Countermeasures against Side-Channel Attacks, Hardware IP Security and Trust
  • Marc Stoettinger, Bernhard Jungk: There Ain't No Plain Key: A PUF based First-Order Side-Channel Resistant Encryption Construction, ISIC 2016 - Document
  • Bernhard Jungk, Marc Stöttinger: Hobbit—Smaller but faster than a dwarf: Revisiting lightweight SHA-3 FPGA implementations, ReConFig 2016
  • Ingrid Verbauwhede, Josep Balasch, Oscar Reparaz, Sorin A. Huss, Kai Rhode, Marc Stottinger, Michael Zohner: Side-Channel Attacks, 2016, CRC Press

2015

  • Wei He, Marc Stottinger, Eduardo de la Torre, Veronica Diaz: Evaluation Tools for Multivariate Side-Channel Analysis, DCIS 2015 - Document
  • Dirmanto Jap, Marc Stöttinger, Shivam Bhasin: Support Vector Regression: Exploiting Machine Learning Techniques for Leakage Modeling, CS2@HiPEAC 2015 - Document
  • Alexander Herrmann, Marc Stöttinger: Evaluation Tools for Multivariate Side-Channel Analysis, CS2@HiPEAC 2015 - Document

2014

  • Alexander Herrmann, Marc Stöttinger: Constructive Side-Channel Analysis for Secure Hardware Design, ISIC 2014 - Document
  • Marc Stöttinger, Gavin Xiaoxu Yao, Ray CC Cheung: Zero Collision Attack and its Countermeasures on Residue Number System Multipliers, ISIC 2014 - Document
  • Christophe Clavier, Jean-Luc Danger, Guillaume Duc, M Abdelaziz Elaabid, Benoît Gérard, Sylvain Guilley, Annelie Heuser, Michael Kasper, Yang Li, Victor Lomné, Daisuke Nakatsu, Kazuo Ohta, Kazuo Sakiyama, Laurent Sauvage, Werner Schindler, Marc Stöttinger, Nicolas Veyrat-Charvillon, Matthieu Walle, Antoine Wurcker: Practical Improvements of Side-Channel Attacks on AES: Feedback from the 2nd DPA Contest, Journal of Cryptographic Engineering, Vol. 4/2014
  • Aderinola Gbade-Alabi, David Keezer, Vincent Mooney, Axel Y Poschmann, Marc Stöttinger, Kshitij Divekar: A Signature Based Architecture for Trojan Detection, WESS 2014 - Document
  • Bernhard Jungk, Marc Stottinger, Matthias Harter: Shrinking KECCAK Hardware Implementations, SHA-3 Workshop 2014
  • Sebastian Kutzner, Phuong Ha Nguyen, Axel Poschmann, Marc Stöttinger: Minimizing S-Boxes in Hardware by Utilizing Linear Transformations, AFRICACRYPT 2014 

2013

  • Sebastian Kutzner, Axel Poschmann, Marc Stöttinger: TROJANUS: An Ultra-Lightweight Side-Channel Leakage Generator for FPGAs, FPT 2013 - Document
  • Fabrizio De Santis, Michael Kasper, Stefan Mangard, Georg Sigl, Oliver Stein, Marc Stöttinger: On the Relationship between Correlation Power Analysis and the Stochastic Approach: An ASIC Designer Perspective,  INDOCRYPT 2013
  • Sebastian Kutzner, Axel Y Poschmann, Marc Stöttinger: Hardware Trojan Design and Detection: A Practical Evaluation, WESS 2013 - Document
  • Bernhard Jungk, Marc Stöttinger: Among Slow Dwarfs and Fast Giants: A Systematic Design Space Exploration of KECCAK, ReCoSoC 2013 - Document
  • Sorin A Huss, Marc Stöttinger, Michael Zohner: Amasive: An Adaptable and Modular Autonomous Side-Channel Vulnerability Evaluation Framework, Number Theory and Cryptography
  • Marc Stöttinger: Mutating Runtime Architectures as a Countermeasure against Power Analysis Attacks, 2013, Tu Darmstadt - Document

2012

  • Bernhard Jungk, Marc Stöttinger, Jan Gampe, Steffen Reith, Sorin A. Huss: Sde-channel resistant AES Architecture Utilizing Randomized Composite Field Representations, FPT 2012
  • Qizhi Tian, Abdulhadi Shoufan, Marc Stoettinger, Sorin A Huss: Power Trace Alignment for Cryptosystems Featuring Random Frequency CountermeasuresICDIPC 2012 - Document
  • Michael Zohner, Marc Stöttinger, Sorin A Huss, Oliver Stein: An Adaptable, Modular, and Autonomous Side-Channel Vulnerability Evaluator, HOST 2012- Document
  • Michael Zohner, Michael Kasper, Marc Stöttinger: Butterfly-Attack on Skein’s Modular Addition, COSADE 2012
  • Michael Zohner, Michael Kasper, Marc Stöttinger: Sorin A Huss: Side Channel Analysis of the SHA-3 Finalists, DATE 2012 - Document
  • Annelie Heuser, Werner Schindler, Marc Stöttinger: Revealing Side-Channel Issues of Complex Circuits by Enhanced Leakage Models, DATE 2012 - Document
  • Annelie Heuser, Michael Kasper, Werner Schindler, Marc Stöttinger: A New Difference Method for Side-Channel Analysis with High-Dimensional Leakage Models, RSA Conference 2012 - Slides

2011

  • Marc Stottinger, Thomas Feller, Sorin A Huss: A Side-Channel Hardened IP-Protection Scheme for FPGA-based Platforms, FPT 2011 - Document
  • Annelie Heuser, Michael Kasper, Werner Schindler, Marc Stottinger: How a Symmetry Metric Assists Side-Channel Evaluation - A Novel Model Verification Method for Power Analysis, DSD 2011
  • H Gregor Molter, Marc Stöttinger, Abdulhadi Shoufan, Falko Strenzke: A Simple Power Analysis Attack on a McEliece Cryptoprocessor, Journal of Cryptographic Engineering, Vol. 4/2011

2010

  •  Alexander Biedermann, Marc Stöttinger, Lijing Chen, Sorin A Huss: Secure Virtualization Within a Multi-Processor Soft-Core System-On-Chip Architecture, SRC 2010 - Document
  • Marc Stöttinger, Sorin A Huss, Sascha Mühlbach, Andreas Koch: Side-Channel Resistance Evaluation of a Neural Network Based Lightweight Cryptography Scheme, EUC2010 - Document
  • Michael Kasper, Werner Schindler, Marc Stöttinger: A Stochastic Method for Security Evaluation of Cryptographic FPGA Implementations, FTP 2010
  •  Marc Stöttinger, Alexander Biedermann, Sorin Alexander Huss: Virtualization within a Parallel Array of Homogeneous Processing Units, ARC2010 - Document
  • Marc Stöttinger, Sunil Malipatlolla, Qizhi Tian: Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms, 2010, Design Methodologies for Secure Embedded Systems
  • Marc Stöttinger, Felix Madlener, Sorin A Huss: Procedures for Securing ECC Implementations against Differential Power Analysis Using Reconfigurable Architectures, 2010, Dynamically Reconfigurable Systems